1. Field of the Invention
This invention relates to transition metal nitrides and carbides that are useful as conductive barrier layers in IC memory cell structures that utilize ferroelectric or high permittivity capacitors. In specific aspects, the invention relates to microelectronic device structures including such conductive barrier layers, and to a method of forming same.
2. Description of the Related Art
Barrier layers are crucial components in many integrated circuits. Depending on the specific application, such barrier layers may be used to prevent diffusion of oxidizing species, silicon, metals, hydrogen, etc., and to promote adhesion, typically while maintaining either adequate electrical conductance or resistance.
Two important applications include copper for advanced metallization using damascene processing, and ferroelectric and high permittivity perovskite oxide films for advanced memories.
Copper has recently come into usage as a practical alternative to aluminum for metallization, in which copper solutions are applied to a substrate under low voltage conditions to cause deposition of the copper metal, followed by chemical mechanical polishing for removal of copper from unwanted areas of the device structure. In such application, to prevent reactions between the copper and the silicon substrate, barrier layers are employed.
The perovskite oxides include BaSrTiO.sub.3 (BST) for DRAMs and PbZrTiO.sub.3 (PZT) and SrBi.sub.2 Ta.sub.2 O.sub.9 (SBT) for FeRAMs. It is well known that these materials require electrodes made from noble metals or noble metal alloys such as Pt, Ir, IrO.sub.2, Pt--Ru, etc. In many memory cell designs, it is desirable to fabricate the capacitors directly over a conductive plug (typically tungsten or polycrystalline silicon) to contact transistors, in order to reduce the area of the memory cell. This geometry (capacitor over plug) is conventionally referred to as a stack capacitor configuration.
For these materials in a stack capacitor configuration, an electrically conductive barrier layer is needed to prevent oxidation of the plug and to prevent diffusion of the plug material through the noble metal bottom electrode. It also may be desirable to use fabrication and structural isolation techniques to protect the plug/barrier/electrode interfaces from oxidation.
A variety of barrier layer materials and associated fabrication techniques have been described in the patent and general technical literature. TiN, TaSiN and TiAlN are typical thin film compositions that have been described as useful for the memory applications discussed above. The principal advantage of TiN is its familiarity in currently utilized manufacturing processes, although several studies have shown it to fail as an adequate barrier layer for perovskite materials under processing temperatures greater than 550.degree. C.
TaSiN has been identified as a potentially useful barrier layer material of fabrication for copper damascene applications in both the use of ferroelectrics and in use of perovskite materials. In ferroelectric applications, when used in a hybrid electrode as a barrier between IrO.sub.2 and polysilicon (p-Si), TaSiN (at a stoichiometric ratio of Ta/Si=10/3) remains conductive after capacitor processing in oxygen to a temperature of 800.degree. C.
The advantage claimed for TaSiN and other metal-silicon nitride (Me--Si--N) compounds is that the presence of silicon tends to prevent crystalline ordering in the thin film. An amorphous TaSiN film has improved resistance to oxidation and diffusion of other species because of the absence of crystalline grain boundaries, since such grain boundaries often facilitate diffusion and subsequent chemical reactions.
Besides TaSiN, other metal silicon nitride thin films have been investigated, wherein the metal constituent is tungsten, titanium, or rhenium. While these amorphous barrier layers have excellent properties, other constraints may require that alternative amorphous barrier layers be utilized. These constraints include the desirability of good step coverage in high aspect ratio trenches and vias, and other combinations of metals may be more amenable to CVD processes to deposit binary or ternary metal nitride and carbide alloys. For deposition using reactive sputtering, it is also known that atoms with higher atomic weight allow improved sidewall coverage because the trajectory of incident atoms is modified by their mass, and alloys with higher atomic weight metals are therefore desirable.
The use of Ti.sub.1-x Al.sub.x N in barrier layer structures is disclosed in Summerfelt et al. U.S. Pat. No. 5,504,041 for "Conductive Exotic-Nitride Barrier Layer for High-Dielectric-Constant Materials." When deposited via reactive sputtering using a titanium-aluminum target, a polycrystalline thin film is produced, with crystalline structure when x&lt;0.60, i.e., with aluminum replacing titanium in the crystalline lattice. The conductivity of these thin films is adequate for satisfactory performance as a conductive barrier. For example, adequate conductance is maintained using Ti.sub.0.60 Al.sub.0.40 N beneath 1000 .ANG. thick platinum films when the layers are subjected to oxidizing conditions exceeding 650.degree. C.
In general, the introduction of aluminum in place of titanium increases the resistance of the resulting titanium-aluminum nitride film to macroscopic oxidation. It is believed that the mechanism for this improvement of oxidation resistance of the TiAlN barrier layer under platinum films (while maintaining sufficiently low contact resistance) involves localized oxidation of the barrier at platinum grain boundaries, with relatively undisturbed contact between the barrier layer and the bulk mass of the platinum grains.
While Ti.sub.1-x Al.sub.x N films have superior properties compared to those of many other candidate barrier layers, the properties of such Ti.sub.1-x Al.sub.x N films would be improved if they could be deposited in an amorphous state, and remain in an amorphous state when subjected to temperatures greater than those employed in subsequent processing (e.g., ferroelectric processing temperatures on the order of 800.degree. C. for formation of strontium bismuth tantalate (SBT) ferroelectric thin films). Such improvement will likely be required to achieve highly robust contacts when high temperature processing is used, especially for fabrication of devices with very small feature sizes, i.e. &lt;0.35 .mu.m.